We've just updated MediaWiki and its underlying software. If anything doesn't look or work quite right, please mention it to us. --RanAS
AND1 (SPC700): Difference between revisions
From SnesLab
(made basic info table shorter) |
(→See Also: MOV1) |
||
| Line 45: | Line 45: | ||
* [[OR1]] | * [[OR1]] | ||
* [[EOR1]] | * [[EOR1]] | ||
* [[MOV1]] | |||
=== External Links === | === External Links === | ||
Revision as of 18:14, 22 July 2023
| Basic Info | |||||||
|---|---|---|---|---|---|---|---|
| Addressing Mode | Opcode | Length | Speed | ||||
| 4A | 3 bytes | 4 cycles | |||||
| 6A | 3 bytes | 4 cycles | |||||
| Flags Clobbered | |||||||
|---|---|---|---|---|---|---|---|
| N | V | P | B | H | I | Z | C |
| . | . | . | . | . | . | . | |
AND1 is an SPC700 instruction that performs a logical AND between a memory bit and the carry flag, then stores the conjunction in the carry flag.
See Also
External Links
- Official Nintendo documentation on AND1: Appendix C-9 of Book I