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AND1 (SPC700): Difference between revisions
From SnesLab
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(→See Also: AND) |
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=== See Also === | === See Also === | ||
* [[AND (SPC700)]] | |||
* [[OR1]] | * [[OR1]] | ||
* [[EOR1]] | * [[EOR1]] | ||
Revision as of 06:38, 23 July 2023
| Basic Info | |||||||
|---|---|---|---|---|---|---|---|
| Addressing Mode | Opcode | Length | Speed | ||||
| 4A | 3 bytes | 4 cycles | |||||
| 6A | 3 bytes | 4 cycles | |||||
| Flags Clobbered | |||||||
|---|---|---|---|---|---|---|---|
| N | V | P | B | H | I | Z | C |
| . | . | . | . | . | . | . | |
AND1 is an SPC700 instruction that performs a logical AND between a memory bit and the carry flag, then stores the conjunction in the carry flag.
See Also
External Links
- Official Nintendo documentation on AND1: Appendix C-9 of Book I