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ROR (SPC700): Difference between revisions
From SnesLab
(typos in manual) |
(accumulator admode) |
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|'''Speed''' | |'''Speed''' | ||
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| | |[[Accumulator Addressing | Accumulator]] | ||
|7C | |7C | ||
|1 byte | |1 byte | ||
Revision as of 18:00, 23 July 2023
| Basic Info | |||||||
|---|---|---|---|---|---|---|---|
| Addressing Mode | Opcode | Length | Speed | ||||
| Accumulator | 7C | 1 byte | 2 cycles | ||||
| 6B | 2 bytes | 4 cycles | |||||
| 7B | 2 bytes | 5 cycles | |||||
| 6C | 3 bytes | 5 cycles | |||||
| Flags Clobbered | |||||||
|---|---|---|---|---|---|---|---|
| N | V | P | B | H | I | Z | C |
| . | . | . | . | . | |||
ROR is an SPC700 instruction that rotates its operand one bit to the right. The old value of the carry flag is rotated into the most significant bit. The least significant bit is rotated into the carry flag.
The official manual has the bit shift operators for ROR pointing the wrong way.
See Also
External Links
- Official Super Nintendo development manual on ROR: Appendix C-7 of Book I