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AND (SPC700): Difference between revisions

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(opcode 27)
Line 1: Line 1:
{| class="wikitable" style="float:right;clear:right;width:40%"
{| class="wikitable" style="float:right;clear:right;width:45%"
!colspan="8"|Basic Info
!colspan="8"|Basic Info
|+
|+
Line 47: Line 47:
|6 cycles
|6 cycles
|+
|+
|
|[[Direct Page Indirect Indexed by Y]]
|37
|37
|2 bytes
|2 bytes

Revision as of 05:44, 24 July 2023

Basic Info
Addressing Mode Opcode Length Speed
Immediate 28 2 bytes 2 cycles
Implied (type 1) 26 1 byte 3 cycles
Direct Page 24 2 bytes 3 cycles
Direct Page Indexed by X 34 2 bytes 4 cycles
Absolute 25 3 bytes 4 cycles
Absolute Indexed by X 35 3 bytes 5 cycles
Absolute Indexed by Y 36 3 bytes 5 cycles
Direct Page Indexed by X 27 2 bytes 6 cycles
Direct Page Indirect Indexed by Y 37 2 bytes 6 cycles
39 1 bytes 5 cycles
29 3 bytes 6 cycles
Direct Page Immediate 38 3 bytes 5 cycles
Flags Affected
N V P B H I Z C
. . . . . .

AND is an SPC700 instruction that performs a logical conjunction.

See Also

External Links