TRB: Difference between revisions

Revision as of 21:55, 19 November 2023


Basic Info
Addressing Mode	Opcode	Length	Speed
Absolute	1C	3 bytes	6 cycles*
Direct Page	14	2 bytes	5 cycles*


Flags Affected
N	V	M	X	D	I	Z	C
.	.	.	.	.	.		.

TRB (Test and Reset Bits) is a 65c816 instruction that tests and resets bits using the accumulator. For each set bit in the accumulator, the corresponding memory bit is cleared. In both addressing modes, TRB takes two additional cycles if the accumulator is 16 bits wide. In direct page addressing, TRB takes another additional cycle if the low byte of the direct page register is nonzero.

External Links

Eyes & Lichty page on TRB: https://archive.org/details/0893037893ProgrammingThe65816/page/n539
Labiak page on TRB: https://archive.org/details/Programming_the_65816/page/n204
snes9x implementation of TRB: https://github.com/snes9xgit/snes9x/blob/master/cpuops.cpp#L1338
undisbeliever on TRB: https://undisbeliever.net/snesdev/65816-opcodes.html#trb-test-and-reset-memory-bits-against-accumulator

@@ Line 10: / Line 10: @@
 |1C
 |3 bytes
-|6 cycles
+|6 cycles*
 |+
 |[[Direct Page Addressing | Direct Page]]
 |14
 |2 bytes
-|5 cycles
+|5 cycles*
 |}
@@ Line 40: / Line 40: @@
 |}
-'''TRB''' (Test and Reset Bits) is a [[65c816]] instruction that tests and resets bits using the [[accumulator]].  For each set bit in the accumulator, the corresponding memory bit is cleared.
+'''TRB''' (Test and Reset Bits) is a [[65c816]] instruction that tests and resets bits using the [[accumulator]].  For each set bit in the accumulator, the corresponding memory bit is cleared.  In both [[addressing modes]], TRB takes two additional cycles if the accumulator is 16 bits wide.  In [[direct page addressing]], TRB takes another additional cycle if the low byte of the [[direct page register]] is nonzero.
 === See Also ===