TSB: Difference between revisions

Revision as of 21:57, 19 November 2023


Basic Info
Addressing Mode	Opcode	Length	Speed
Absolute	0C	3 bytes	6 cycles*
Direct Page	04	2 bytes	5 cycles*


Flags Affected
N	V	M	X	D	I	Z	C
.	.	.	.	.	.		.

TSB (Test and Set Bits) is a 65c816 instruction that tests and sets bits using the accumulator. For each set bit of the accumulator, the corresponding memory bit is also set. TSB takes two additional cycles if the accumulator is 16 bits wide. In direct page addressing, TSB takes another additional cycle if the low byte of the direct page register is nonzero.

External Links

Eyes & Lichty page on TSB: https://archive.org/details/0893037893ProgrammingThe65816/page/n540
Labiak page on TSB: https://archive.org/details/Programming_the_65816/page/n205
snes9x implementation of TSB: https://github.com/snes9xgit/snes9x/blob/master/cpuops.cpp#L1348
undisbeliever on TSB: https://undisbeliever.net/snesdev/65816-opcodes.html#tsb-test-and-set-memory-bits-against-accumulator

@@ Line 10: / Line 10: @@
 |0C
 |3 bytes
-|6 cycles
+|6 cycles*
 |+
 |[[Direct Page Addressing | Direct Page]]
 |04
 |2 bytes
-|5 cycles
+|5 cycles*
 |}
@@ Line 40: / Line 40: @@
 |}
-'''TSB''' (Test and Set Bits) is a [[65c816]] instruction that tests and sets bits using the accumulator.  For each set bit of the accumulator, the corresponding memory bit is also set.
+'''TSB''' (Test and Set Bits) is a [[65c816]] instruction that tests and sets bits using the accumulator.  For each set bit of the accumulator, the corresponding memory bit is also set.  TSB takes two additional cycles if the accumulator is 16 bits wide. In [[direct page addressing]], TSB takes another additional cycle if the low byte of the [[direct page register]] is nonzero.
 === See Also ===