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LDX: Difference between revisions

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(clobbered -> affected)
(dp alignment penalty)
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|A2
|A2
|2 bytes
|2 bytes
|2 cycles
|2 cycles*
|+
|+
|absolute
|absolute
|AE
|AE
|3 bytes
|3 bytes
|4 cycles
|4 cycles*
|+
|+
|direct page
|direct page
|A6
|A6
|2 bytes
|2 bytes
|3 cycles
|3 cycles*
|+
|+
|absolute indexed Y
|absolute indexed Y
|BE
|BE
|3 bytes
|3 bytes
|4 cycles
|4 cycles*
|+
|+
|direct page indexed Y
|direct page indexed Y
|B6
|B6
|2 bytes
|2 bytes
|4 cycles
|4 cycles*
|}
|}


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'''LDX''' (Load X) is a 65x instruction that loads the [[X index register]].
'''LDX''' (Load X) is a 65x instruction that loads the [[X index register]].  In [[direct page addressing]] modes, LDX takes another extra cycle if the low byte of the [[direct page register]] is nonzero.


=== See Also ===
=== See Also ===

Revision as of 01:16, 20 November 2023

Basic Info
Addressing Mode Opcode Length Speed
immediate A2 2 bytes 2 cycles*
absolute AE 3 bytes 4 cycles*
direct page A6 2 bytes 3 cycles*
absolute indexed Y BE 3 bytes 4 cycles*
direct page indexed Y B6 2 bytes 4 cycles*
Flags Affected
N V M X D I Z C
. . . . . .

LDX (Load X) is a 65x instruction that loads the X index register. In direct page addressing modes, LDX takes another extra cycle if the low byte of the direct page register is nonzero.

See Also

External Links

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