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TSB: Difference between revisions

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!colspan="8"|Flags Affected
!colspan="8"|Flags Affected
|+
|+
|N
|[[Negative Flag|N]]
|V
|[[Overflow Flag|V]]
|M
|[[M Flag|M]]
|X
|[[X Flag|X]]
|D
|[[Decimal Flag|D]]
|I
|[[I Flag|I]]
|Z
|[[Zero Flag|Z]]
|C
|[[Carry Flag|C]]
|+
|+
|.
|.

Revision as of 04:05, 27 November 2023

Basic Info
Addressing Mode Opcode Length Speed
Absolute 0C 3 bytes 6 cycles*
Direct Page 04 2 bytes 5 cycles*
Flags Affected
N V M X D I Z C
. . . . . . .

TSB (Test and Set Bits) is a 65c816 instruction that tests and sets bits using the accumulator. For each set bit of the accumulator, the corresponding memory bit is also set. TSB takes two additional cycles if the accumulator is 16 bits wide. In direct page addressing, TSB takes another additional cycle if the low byte of the direct page register is nonzero.

See Also

External Links