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ROR (SPC700): Difference between revisions

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(abs and dp, x)
(linkify flags)
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!colspan="8"|Flags Clobbered
!colspan="8"|Flags Clobbered
|+
|+
|N
|[[Negative Flag|N]]
|V
|[[Overflow Flag|V]]
|P
|[[Direct Page Flag|P]]
|B
|[[Break Flag|B]]
|H
|[[Half-Carry Flag|H]]
|I
|[[Interrupt Enable Flag|I]]
|Z
|[[Zero Flag|Z]]
|C
|[[Carry Flag|C]]
|+
|+
|
|

Revision as of 05:01, 27 November 2023

Basic Info
Addressing Mode Opcode Length Speed
Accumulator 7C 1 byte 2 cycles
Direct Page 6B 2 bytes 4 cycles
Direct Page Indexed by X 7B 2 bytes 5 cycles
Absolute 6C 3 bytes 5 cycles
Flags Clobbered
N V P B H I Z C
. . . . .

ROR is an SPC700 instruction that rotates its operand one bit to the right. The old value of the carry flag is rotated into the most significant bit. The least significant bit is rotated into the carry flag.

The official manual has the bit shift operators for ROR pointing the wrong way.

See Also

External Links