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REP: Difference between revisions

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(→‎See Also: CLC, CLV)
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=== See Also ===
=== See Also ===
* [[SEP]]
* [[SEP]]
* [[CLC]]
* [[CLV]]


=== External Links ===
=== External Links ===

Revision as of 06:30, 7 December 2023

Basic Info
Addressing Mode Opcode Length Speed
Immediate C2 2 bytes 3 cycles
Flags Affected
N V M X D I Z C
emulation mode . .
native mode

REP (Reset Status Bits) is a 65c816 instruction that clears bits in the status register that correspond to set bits in the operand.

See Also

External Links