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INX: Difference between revisions
From SnesLab
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[[Category:One-byte Instructions]] | [[Category:One-byte Instructions]] | ||
[[Category:Implied Instructions]] | [[Category:Implied Instructions]] | ||
[[Category:Two-cycle Instructions]] | |||
Revision as of 11:39, 14 December 2023
| Basic Info | |||||||
|---|---|---|---|---|---|---|---|
| Addressing Mode | Opcode | Length | Speed | ||||
| Implied (type 1) | E8 | 1 byte | 2 cycles | ||||
| Flags Affected | |||||||
|---|---|---|---|---|---|---|---|
| N | V | M | X | D | I | Z | C |
| . | . | . | . | . | . | ||
INX is a 65x instruction that increments the X index register by one. The state of the decimal flag has no effect on the behavior of INX.
See Also
External Links
- Eyes & Lichty page 457, on INX: https://archive.org/details/0893037893ProgrammingThe65816/page/n483
- Labiak page 143 on INX: https://archive.org/details/Programming_the_65816/page/n153
- MCS6500 Manual page 97 on INX: https://archive.org/details/mos_microcomputers_programming_manual/page/n115
- Carr page 260 on INX: https://archive.org/details/6502UsersManual/page/n273
- Leventhal page 3-67 on INX: https://archive.org/details/6502-assembly-language-programming/page/n116
- snes9x implementation of INX: https://github.com/snes9xgit/snes9x/blob/master/cpuops.cpp#L1546