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OR1 (SPC700): Difference between revisions

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(bit reversal)
(only one operand in instruction stream)
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The [[bit reversal]] operator may be prefixed to the memory bit address, in which case opcode 2A is assembled.
The [[bit reversal]] operator may be prefixed to the memory bit address, in which case opcode 2A is assembled.
The operands are stored in the instruction stream in the opposite order they appear in the assembler source. In the assembler source, the operand on the right is the source and the operand on the left is the destination.


=== See Also ===
=== See Also ===

Revision as of 09:07, 18 December 2023

Basic Info
Addressing Mode Opcode Length Speed
Absolute Boolean Bit 0A 3 bytes 5 cycles
Absolute Boolean Bit 2A 3 bytes 5 cycles
Flags Affected
N V P B H I Z C
. . . . . . .

OR1 is an SPC700 instruction that performs a logical or between a memory bit and the carry flag, then stores the disjunction in the carry flag. The low 13 bits of the operand byte specify an absolute address. The high 3 bits of the operand byte specify which bit at that absolute address.

The bit reversal operator may be prefixed to the memory bit address, in which case opcode 2A is assembled.

See Also

External Links