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BIT: Difference between revisions

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|3 cycles*
|3 cycles*
|+
|+
|absolute indexed X
|[[Absolute Indexed by X]]
|3C
|3C
|3 bytes
|3 bytes
|4 cycles*
|4 cycles*
|+
|+
|direct page indexed X
|[[Direct Page Indexed by X]]
|34
|34
|2 bytes
|2 bytes

Revision as of 23:03, 26 June 2024

Basic Info
Addressing Mode Opcode Length Speed
Immediate 89 2 bytes* 2 cycles*
Absolute 2C 3 bytes 4 cycles*
Direct Page 24 2 bytes 3 cycles*
Absolute Indexed by X 3C 3 bytes 4 cycles*
Direct Page Indexed by X 34 2 bytes 4 cycles*
Flags Affected
Addressing Mode N V M X D I Z C
Immediate . . . . . . .
other . . . . .

BIT is a 65x instruction that performs a logical AND operation between the accumulator and memory without storing the conjunction. If the conjunction is zero, the zero flag is set, otherwise it is cleared.

Except in immediate addressing, the most significant bit of the data located at the effective address is moved into the negative flag, and the second most significant bit of that data is moved into the overflow flag. BIT is often used right before a conditional branch instruction.

Cycle Penalties

See Also

External Links