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Index Register Select: Difference between revisions
From SnesLab
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'''Index Register Select''' is a flag in the [[processor status register]] (bit | '''Index Register Select''' (X) is a flag in the [[processor status register]] (bit 4) of the [[65c816]]. It indicates how wide the [[index register]]s are: | ||
When clear, both index registers are 16 bits wide. | * When clear, both index registers are 16 bits wide. | ||
When set, both index registers are 8 bits wide. | * When set, both index registers are 8 bits wide. | ||
It is not possible to control the width of the two index registers individually. | It is not possible to control the width of the two index registers individually. | ||
| Line 15: | Line 15: | ||
=== See Also === | === See Also === | ||
* [[Memory/Accumulator Select]] | * [[Memory/Accumulator Select]] | ||
=== References === | |||
* [[Eyes & Lichty]], page 422, Table 18.2. 65x Flags. https://archive.org/details/0893037893ProgrammingThe65816/page/422 | |||
[[Category:ASM]] | [[Category:ASM]] | ||
[[Category:Flags]] | [[Category:Flags]] | ||
[[Category:65c816 additions]] | [[Category:65c816 additions]] | ||
Revision as of 23:52, 6 July 2024
Index Register Select (X) is a flag in the processor status register (bit 4) of the 65c816. It indicates how wide the index registers are:
- When clear, both index registers are 16 bits wide.
- When set, both index registers are 8 bits wide.
It is not possible to control the width of the two index registers individually.
It can be affected by:
See Also
References
- Eyes & Lichty, page 422, Table 18.2. 65x Flags. https://archive.org/details/0893037893ProgrammingThe65816/page/422