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SEP: Difference between revisions

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(added syntax)
(→‎See Also: derailment)
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* [[SED]]
* [[SED]]
* [[SEI]]
* [[SEI]]
* [[Derailment]]


=== External Links ===
=== External Links ===

Revision as of 03:38, 8 July 2024

Basic Info
Addressing Mode Opcode Length Speed
Immediate E2 2 bytes 3 cycles
Flags Affected
N V M X D I Z C
emulation mode . .
native mode

SEP (Set Status Bits) is a 65c816 instruction that sets bits in the status register that correspond to set bits in the operand.

SEP appears to be the only way to set the m and x flags other than PLP and RTI.

Syntax

SEP #nvmxdizc

See Also

External Links