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Direct Page Bit Addressing: Difference between revisions
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=== Reference === | === Reference === | ||
* Figure 3-8-3 Memory Access Addressing Effective Address on page 3-8-9 of Book I of the official Super Nintendo development manual | * Figure 3-8-3 Memory Access Addressing Effective Address on [https://archive.org/details/SNESDevManual/book1/page/n187 page 3-8-9 of Book I] of the official Super Nintendo development manual | ||
[[Category:ASM]] | [[Category:ASM]] | ||
[[Category:Addressing Modes]] | [[Category:Addressing Modes]] | ||
[[Category:SPC700]] | [[Category:SPC700]] | ||
Revision as of 20:04, 12 July 2024
Direct Page Bit Addressing is supported by the SPC700 by the following instructions:
Syntax
CLR1 dip. bit SET1 dip. bit
See Also
Reference
- Figure 3-8-3 Memory Access Addressing Effective Address on page 3-8-9 of Book I of the official Super Nintendo development manual