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ROR (SPC700): Difference between revisions
From SnesLab
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(→See Also: SPC/LSR) |
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=== See Also === | === See Also === | ||
* [[ROL (SPC700)]] | * [[ROL (SPC700)]] | ||
* [[LSR (SPC700)]] | |||
* [[ROR]] | * [[ROR]] | ||
* [[ROR (Super FX)]] | * [[ROR (Super FX)]] |
Revision as of 11:11, 23 July 2024
Basic Info | |||||||
---|---|---|---|---|---|---|---|
Addressing Mode | Opcode | Length | Speed | ||||
Accumulator | 7C | 1 byte | 2 cycles | ||||
Direct Page | 6B | 2 bytes | 4 cycles | ||||
Direct Page Indexed by X | 7B | 2 bytes | 5 cycles | ||||
Absolute | 6C | 3 bytes | 5 cycles |
Flags Affected | |||||||
---|---|---|---|---|---|---|---|
N | V | P | B | H | I | Z | C |
. | . | . | . | . |
ROR is an SPC700 instruction that rotates every bit of its operand one bit to the right. The old value of the carry flag is rotated into the most significant bit. The least significant bit is rotated into the carry flag.
The official manual has the bit shift operators for ROR pointing the wrong way.
Syntax
ROR A ROR dp ROR dp+X ROR !abs
See Also
External Links
- Official Super Nintendo development manual on ROR: Appendix C-7 of Book I
- anomie: https://github.com/yupferris/TasmShiz/blob/master/spc700.txt#L554