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PLA: Difference between revisions

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(made flags affected more prominent)
(→‎External Links: hid archive URL on Labiak)
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=== External Links ===
=== External Links ===
* [[Eyes & Lichty]] page 483, on PLA: https://archive.org/details/0893037893ProgrammingThe65816/page/483
* [[Eyes & Lichty]] page 483, on PLA: https://archive.org/details/0893037893ProgrammingThe65816/page/483
* [[Labiak]] page 167 on PLA: https://archive.org/details/Programming_the_65816/page/n177
* [[Labiak]], [https://archive.org/details/Programming_the_65816/page/n177 page 167] on PLA
* [[MCS6500 Manual]] page 118 on PLA: https://archive.org/details/mos_microcomputers_programming_manual/page/n137
* [[MCS6500 Manual]] page 118 on PLA: https://archive.org/details/mos_microcomputers_programming_manual/page/n137
* [[Carr]] page 268 on PLA: https://archive.org/details/6502UsersManual/page/n281
* [[Carr]] page 268 on PLA: https://archive.org/details/6502UsersManual/page/n281

Revision as of 14:38, 6 August 2024

Basic Info
Addressing Mode Opcode Length Speed
Stack (Pull) 68 1 byte 4 cycles*
Flags Affected
N V M X D I Z C
N . . . . . Z .

PLA (PulL Accumulator) is a 65x instruction that pulls the value at the top of the stack into the accumulator. PLA increments the stack pointer before the pull. If the accumulator is 16 bits wide, the low byte is pulled and then the high byte is pulled.

The Eyes & Lichty page on PLA has a typo that says the 65x pull instructions "set" the zero and negative flags; it should say "affect."

The negative flag will then match the most significant bit of the pulled value. The zero flag will indicate whether the pulled value is zero.

Syntax

PLA
Cycle Penalty
  • PLA takes one extra cycle if the accumulator is 16 bits wide.

See Also

External Links