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TXA: Difference between revisions

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(→‎External Links: hid archive URL for Leventhal)
(→‎External Links: hid archive URL for Carr)
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* [[Labiak]], [https://archive.org/details/Programming_the_65816/page/n208 page 198] on TXA
* [[Labiak]], [https://archive.org/details/Programming_the_65816/page/n208 page 198] on TXA
* [[MCS6500 Manual]] page 100 on TXA: https://archive.org/details/mos_microcomputers_programming_manual/page/n118
* [[MCS6500 Manual]] page 100 on TXA: https://archive.org/details/mos_microcomputers_programming_manual/page/n118
* [[Carr]] page 276 on TXA: https://archive.org/details/6502UsersManual/page/n289
* [[Carr]], [https://archive.org/details/6502UsersManual/page/n289 page 276] on TXA
* [[Leventhal]], [https://archive.org/details/6502-assembly-language-programming/page/n151 page 3-102] on TXA
* [[Leventhal]], [https://archive.org/details/6502-assembly-language-programming/page/n151 page 3-102] on TXA
* snes9x implementation of TXA: https://github.com/snes9xgit/snes9x/blob/master/cpuops.cpp#L2384
* snes9x implementation of TXA: https://github.com/snes9xgit/snes9x/blob/master/cpuops.cpp#L2384

Revision as of 21:12, 7 August 2024

Basic Info
Addressing Mode Opcode Length Speed
Implied (type 1) 8A 1 byte 2 cycles
Flags Affected
N V M X D I Z C
N . . . . . Z .

TXA is a 65x instruction that transfers the value of the X index register to the accumulator.

Instruction Behavior
8-bit accumulator (m=1) 16-bit accumulator (m=0)
8-bit index registers (x=1) 8 bits are transferred 8 bits are transferred to the low byte of accumulator and high byte of the accumulator is zeroed
16-bit index registers (x=0) 8 bits are transferred 16 bits are transferred

Syntax

TXA

See Also

External Links