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TAX
From SnesLab
| Basic Info | |||||||
|---|---|---|---|---|---|---|---|
| Addressing Mode | Opcode | Length | Speed | ||||
| Implied (type 1) | AA | 1 byte | 2 cycles | ||||
| Flags Affected | |||||||
|---|---|---|---|---|---|---|---|
| N | V | M | X | D | I | Z | C |
| N | . | . | . | . | . | Z | . |
TAX is a 65x instruction that transfers the value of the accumulator to the X index register. The size of the X index register determines how many bytes are transferred. TAX does not care how wide the accumulator is. TAX always takes two cycles, regardless of whether one or two bytes are transferred.
| Instruction Behavior | ||
|---|---|---|
| 8-bit accumulator (m=1) | 16-bit accumulator (m=0) | |
| 8-bit index registers (x=1) | 8 bits are transferred | 8 bits are transferred (low byte of accumulator) |
| 16-bit index registers (x=0) | 16 bits are transferred (including hidden upper byte) | 16 bits are transferred (full C accumulator) |
Syntax
TAX
See Also
External Links
- Eyes & Lichty, page 508 on TAX
- Labiak, page 189 on TAX
- 7.11 on MCS6500 Manual, page 100 on TAX
- Carr, page 275 on TAX
- Leventhal, page 3-99 on TAX
- snes9x implementation of TAX: https://github.com/snes9xgit/snes9x/blob/master/cpuops.cpp#L2258