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Memory/Accumulator Select: Difference between revisions
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The '''Memory/Accumulator Select''' (M) flag exists in the [[processor status register]] (bit 5) of the [[65c816]]. It indicates whether the [[accumulator]] is 8 or 16 bits wide: | The '''Memory/Accumulator Select''' (M) flag exists in the [[processor status register]] (bit 5) of the [[65c816]]. It indicates whether the [[accumulator]] is 8 or 16 bits wide: | ||
* When clear, the accumulator is 16 bits wide. | * When clear, the accumulator is 16 bits wide. It can only be clear in [[native mode]]. | ||
* When set, the accumulator is 8 bits wide, but the high byte (B) is still retained. | * When set, the accumulator is 8 bits wide, but the high byte (B) is still retained. | ||
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* [[RTI]] | * [[RTI]] | ||
It affects the behavior of (incomplete list): | |||
* [[LDA]] | |||
* [[STA]] | |||
There are no BMS or BMC instructions that examine this flag. | There are no BMS or BMC instructions that examine this flag. | ||
Revision as of 22:27, 9 August 2024
The Memory/Accumulator Select (M) flag exists in the processor status register (bit 5) of the 65c816. It indicates whether the accumulator is 8 or 16 bits wide:
- When clear, the accumulator is 16 bits wide. It can only be clear in native mode.
- When set, the accumulator is 8 bits wide, but the high byte (B) is still retained.
It can be affected by:
It affects the behavior of (incomplete list):
There are no BMS or BMC instructions that examine this flag.
See Also
Reference
- Eyes & Lichty, page 422, Table 18.2. 65x Flags.