Interrupt Disable Flag: Difference between revisions

Revision as of 04:30, 12 August 2024

The Interrupt Disable Flag (I) is bit 2 of the 65c816's status register.

SEI sets it and CLI clears it. (SEP and REP can as well.) BRK and COP set it too.

This flag is automatically set whenever the processor begins servicing an interrupt.

BRK ignores its previous state.

There are no BIS or BIC instructions that examine this flag (though there is an unrelated BIC (Super FX) instruction).

Revision as of 20:06, 9 August 2024 (view source) Xetheria (talk \| contribs) (more info on BRK) ← Older edit		Revision as of 04:30, 12 August 2024 (view source) Xetheria (talk \| contribs) (shorten description) Newer edit →
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	The '''Interrupt Disable Flag''' (I) ~~exists on~~ the [[65c816]] ~~as bit 2 of the~~ [[status register]].		The '''Interrupt Disable Flag''' (I) is bit 2 of the [[65c816]]'s [[status register]].

	[[SEI]] sets it and [[CLI]] clears it. ([[SEP]] and [[REP]] can as well.) [[BRK]] and [[COP]] set it too.		[[SEI]] sets it and [[CLI]] clears it. ([[SEP]] and [[REP]] can as well.) [[BRK]] and [[COP]] set it too.