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PLA: Difference between revisions
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==== Cycle Penalty ==== | |||
* PLA takes one extra cycle if the accumulator is 16 bits wide. | * PLA takes one extra cycle if the accumulator is 16 bits wide. | ||
Latest revision as of 17:39, 23 August 2024
| Basic Info | |||||||
|---|---|---|---|---|---|---|---|
| Addressing Mode | Opcode | Length | Speed | ||||
| Stack (Pull) | 68 | 1 byte | 4 cycles* | ||||
| Flags Affected | ||||||||
|---|---|---|---|---|---|---|---|---|
| N | V | M | X | D | I | Z | C | |
| N | . | . | . | . | . | Z | . | |
PLA (PulL Accumulator) is a 65x instruction that pulls the value at the top of the stack into the accumulator. PLA increments the stack pointer before the pull by the number of bytes pulled. If the accumulator is 16 bits wide, the low byte is pulled and then the high byte is pulled.
The Eyes & Lichty page on PLA has a typo that says the 65x pull instructions "set" the zero and negative flags; it should say "affect."
The negative flag will then match the most significant bit of the pulled value. The zero flag will indicate whether the pulled value is zero.
Syntax
PLA
Cycle Penalty
- PLA takes one extra cycle if the accumulator is 16 bits wide.
See Also
External Links
- Eyes & Lichty, page 483 on PLA
- Labiak, page 167 on PLA
- 8.6 on MCS6500 Manual, page 118 on PLA
- Carr, page 268 on PLA
- Leventhal, page 3-83 on PLA
- snes9x implementation of https://github.com/snes9xgit/snes9x/blob/master/cpuops.cpp#L1982