AND (SPC700): Difference between revisions

Revision as of 16:49, 24 July 2023


Basic Info
Addressing Mode	Opcode	Length	Speed
Immediate	28	2 bytes	2 cycles
Implied Indirect (type 1)	26	1 byte	3 cycles
Direct Page	24	2 bytes	3 cycles
Direct Page Indexed by X	34	2 bytes	4 cycles
Absolute	25	3 bytes	4 cycles
Absolute Indexed by X	35	3 bytes	5 cycles
Absolute Indexed by Y	36	3 bytes	5 cycles
Direct Page Indexed by X	27	2 bytes	6 cycles
Direct Page Indirect Indexed by Y	37	2 bytes	6 cycles
Implied Indirect (type 1)	39	1 bytes	5 cycles
Direct Page	29	3 bytes	6 cycles
Direct Page Immediate	38	3 bytes	5 cycles


Flags Affected
N	V	P	B	H	I	Z	C
	.	.	.	.	.		.

AND is an SPC700 instruction that performs a logical conjunction.

@@ Line 12: / Line 12: @@
 |2 cycles
 |+
-|[[Implied]] (type 1)
+|[[Implied Indirect]] (type 1)
 |26
 |1 byte
@@ Line 52: / Line 52: @@
 |6 cycles
 |+
-|[[Implied]] (type 1)
+|[[Implied Indirect]] (type 1)
 |39
 |1 bytes