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Mode 7 VRAM Map

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In Mode 7, the PPU expects the first 25% (16K) of VRAM to be filled with the tilemap and tile data. The tilemap is stored in the low bytes of each 16-bit word, and the tileset is stored in the high bytes. Appendix A-11 has a bit-breakdown diagram of what a word of this chunk of VRAM should look like.[2]

See Also

References

  1. Appendix A-15 of Book II of the official Super Nintendo development manual
  2. Appendix A-11, lbid.
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