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VRAM Bus Control

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Revision as of 18:34, 29 December 2023 by Xetheria (talk | contribs) (see also VRAM Data Bus)
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VRAM Bus Control, so-called in Figure 2-22-1 "Super NES Functional Block Diagram" of the official Super Nintendo development manual[1], is the VRAM address bus. It connects S-PPU1 to VRAM. It is not connected to anything else.

See Also

External Links

  1. Page 2-22-2 of Book I