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TCLR1 (SPC700)

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Revision as of 06:45, 23 July 2023 by Xetheria (talk | contribs) (→‎See Also: CLR1)
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Basic Info
Addressing Mode Opcode Length Speed
absolute 4E 3 byte 6 cycles
Flags Clobbered
N V P B H I Z C
. . . . . .

TCLR1 is an SPC700 instruction that tests and clears bits with the accumulator.

See Also

External Links