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Gray Bus: Difference between revisions
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The '''Gray Bus''', as it appears in the colorized jwdonal schematic, consists of three signals: /VAWR, /VBWR, and /VRD. They are generated by [[S-PPU1]] (pins 78, 79, and 80, respectively) and feed into the [[VRAM]] chips. | The '''Gray Bus''', as it appears in the colorized [[jwdonal schematic]], consists of three signals: /VAWR, /VBWR, and /VRD. They are generated by [[S-PPU1]] (pins 78, 79, and 80, respectively) and feed into the [[VRAM]] chips. | ||
[[Category:SNES Hardware]] | [[Category:SNES Hardware]] | ||
[[Category:Traces]] | [[Category:Traces]] | ||
[[Category:Buses]] | [[Category:Buses]] | ||
Latest revision as of 08:40, 10 July 2023
The Gray Bus, as it appears in the colorized jwdonal schematic, consists of three signals: /VAWR, /VBWR, and /VRD. They are generated by S-PPU1 (pins 78, 79, and 80, respectively) and feed into the VRAM chips.