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VRAM Bus Control: Difference between revisions

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(what it connects to)
(see also VRAM Data Bus)
 
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'''VRAM Bus Control''', so-called in Figure 2-22-1 "Super NES Functional Block Diagram" of the official Super Nintendo development manual<sup>[1]</sup>, is the VRAM address bus.  It connects [[S-PPU1]] to [[VRAM]].  It is not connected to anything else.
'''VRAM Bus Control''', so-called in Figure 2-22-1 "Super NES Functional Block Diagram" of the official Super Nintendo development manual<sup>[1]</sup>, is the VRAM address bus.  It connects [[S-PPU1]] to [[VRAM]].  It is not connected to anything else.
=== See Also ===
* [[VRAM Data Bus]]


=== External Links ===
=== External Links ===

Latest revision as of 18:34, 29 December 2023

VRAM Bus Control, so-called in Figure 2-22-1 "Super NES Functional Block Diagram" of the official Super Nintendo development manual[1], is the VRAM address bus. It connects S-PPU1 to VRAM. It is not connected to anything else.

See Also

External Links

  1. Page 2-22-2 of Book I