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S-DSP: Difference between revisions
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[[File:s-dsp schematic.png|thumb|S-DSP in region D4 of the [[jwdonal schematic]]]] | [[File:s-dsp schematic.png|thumb|S-DSP in region D4 of the [[jwdonal schematic]]]] | ||
The '''S-DSP''' is the digital signal processor. It produces audio for the [[DAC]] and is controlled by the [[ | The '''S-DSP''' is the digital signal processor. It produces audio for the [[DAC]] and is controlled by the [[S-SMP]]. It is clocked by [[X2]]. | ||
It has 128 registers (DSPRAM) that can be manipulated by the SPC, some of which serve no hard-wired purpose and can be used as general-purpose RAM. | It has 128 registers (DSPRAM) that can be manipulated by the SPC, some of which serve no hard-wired purpose and can be used as general-purpose RAM. | ||
Revision as of 04:38, 29 November 2023
S-DSP in region D4 of the jwdonal schematic
The S-DSP is the digital signal processor. It produces audio for the DAC and is controlled by the S-SMP. It is clocked by X2.
It has 128 registers (DSPRAM) that can be manipulated by the SPC, some of which serve no hard-wired purpose and can be used as general-purpose RAM.
The highest sound frequency that the S-DSP can produce is 16kHz, because of the 32kHz rate that sample-points are output. [1]