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'''TRB''' (Test and Reset Bits) is a [[65c816]] instruction that tests and resets bits.
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{| class="wikitable" style="float:right;clear:right;width:30%"
!colspan="8"|Basic Info
!colspan="8"|Basic Info
|+
|+
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|'''Speed'''
|'''Speed'''
|+
|+
|absolute
|[[Absolute Addressing | Absolute]]
|1C
|1C
|3 bytes
|3 bytes
|6 cycles
|6 cycles*
|+
|+
|direct page
|[[Direct Page Addressing | Direct Page]]
|14
|14
|2 bytes
|2 bytes
|5 cycles
|5 cycles*
|}
|}


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{| class="wikitable" style="float:right;clear:right;width:30%"
!colspan="8"|Flags Clobbered
!colspan="8"|Flags Affected
|+
|+
|N
|[[Negative Flag|N]]
|V
|[[Overflow Flag|V]]
|M
|[[M Flag|M]]
|X
|[[X Flag|X]]
|D
|[[Decimal Flag|D]]
|I
|[[I Flag|I]]
|Z
|[[Zero Flag|Z]]
|C
|[[Carry Flag|C]]
|+
|+
|.
|.
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|.
|.
|.
|.
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|Z
|.
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'''TRB''' (Test and Reset Bits) is a [[65c816]] instruction that tests and resets bits using the [[accumulator]].  For each set bit in the accumulator, TRB clears the corresponding memory bit.
TRB performs a logical AND (conjunction) and the [[zero flag]] is set or cleared to reflect whether the conjunction is zero.  The conjunction itself is discarded.
==== Syntax ====
<pre>
TRB addr
TRB dp
</pre>
==== Cycle Penalties ====
* In both [[addressing modes]], TRB takes two extra cycles if the accumulator is 16 bits wide.
* In [[direct page addressing]], TRB takes another extra cycle if the low byte of the [[direct page register]] is nonzero.


=== See Also ===
=== See Also ===
* [[TSB]]
* [[TSB]]
* [[BIT]]
* [[REP]]
* [[TCLR1]]


=== External Links ===
=== External Links ===
* [[Eyes & Lichty]] page on TRB: https://archive.org/details/0893037893ProgrammingThe65816/page/n539
* [[Eyes & Lichty]], [https://archive.org/details/0893037893ProgrammingThe65816/page/513 page 513] on TRB
* [[Labiak]], [https://archive.org/details/Programming_the_65816/page/n204 page 194] on TRB
* snes9x implementation of TRB: https://github.com/snes9xgit/snes9x/blob/master/cpuops.cpp#L1338
* undisbeliever on TRB: https://undisbeliever.net/snesdev/65816-opcodes.html#trb-test-and-reset-memory-bits-against-accumulator


[[Category:ASM]]
[[Category:ASM]]
[[Category:Read-Modify-Write Instructions]]
[[Category:Read-Modify-Write Instructions]]
[[Category:Test-and-Change-Bits Instructions]]]
[[Category:65c02 additions]]
[[Category:65c02 additions]]

Latest revision as of 17:50, 23 August 2024

Basic Info
Addressing Mode Opcode Length Speed
Absolute 1C 3 bytes 6 cycles*
Direct Page 14 2 bytes 5 cycles*
Flags Affected
N V M X D I Z C
. . . . . . Z .

TRB (Test and Reset Bits) is a 65c816 instruction that tests and resets bits using the accumulator. For each set bit in the accumulator, TRB clears the corresponding memory bit.

TRB performs a logical AND (conjunction) and the zero flag is set or cleared to reflect whether the conjunction is zero. The conjunction itself is discarded.

Syntax

TRB addr
TRB dp

Cycle Penalties

See Also

External Links