We've just updated MediaWiki and its underlying software. If anything doesn't look or work quite right, please mention it to us. --RanAS
TCLR1 (SPC700): Difference between revisions
From SnesLab
(→External Links: added anomie link) |
(Active voice) |
||
| (2 intermediate revisions by the same user not shown) | |||
| Line 25: | Line 25: | ||
|[[Carry Flag|C]] | |[[Carry Flag|C]] | ||
|+ | |+ | ||
| | |N | ||
|. | |. | ||
|. | |. | ||
| Line 31: | Line 31: | ||
|. | |. | ||
|. | |. | ||
| | |Z | ||
|. | |. | ||
|} | |} | ||
'''TCLR1''' is an [[SPC700]] instruction that tests and clears memory bits using the [[accumulator]]. For every set bit in the accumulator, the corresponding memory bit | '''TCLR1''' is an [[SPC700]] instruction that tests and clears memory bits using the [[accumulator]]. For every set bit in the accumulator, TCLR1 clears the corresponding memory bit. | ||
==== Syntax ==== | ==== Syntax ==== | ||
| Line 41: | Line 41: | ||
TCLR1 !abs | TCLR1 !abs | ||
</pre> | </pre> | ||
Where abs is any address in the whole 64K [[bank]]. | Where abs is any address in the whole 64K [[bank]] of [[ARAM]]. | ||
=== See Also === | === See Also === | ||
Latest revision as of 17:40, 11 August 2024
| Basic Info | |||||||
|---|---|---|---|---|---|---|---|
| Addressing Mode | Opcode | Length | Speed | ||||
| Absolute | 4E | 3 bytes | 6 cycles | ||||
| Flags Affected | |||||||
|---|---|---|---|---|---|---|---|
| N | V | P | B | H | I | Z | C |
| N | . | . | . | . | . | Z | . |
TCLR1 is an SPC700 instruction that tests and clears memory bits using the accumulator. For every set bit in the accumulator, TCLR1 clears the corresponding memory bit.
Syntax
TCLR1 !abs
Where abs is any address in the whole 64K bank of ARAM.
See Also
External Links
- Official Nintendo documentation on TCLR1: Table C-18 in Appendix C-9 of Book I
- subparagraph 8.2.3.2 of page 3-8-8, lbid.
- anomie: https://github.com/yupferris/TasmShiz/blob/master/spc700.txt#L606