Accumulator Addressing: Difference between revisions
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There are six instructions that support '''Accumulator Addressing''' on the [[65c816]] | There are six instructions that support '''Accumulator Addressing''' on the [[65c816]]: | ||
* [[ASL]] (opcode 0A) | * [[ASL]] (opcode 0A) | ||
| Line 8: | Line 8: | ||
* [[ROR]] (opcode 6A) | * [[ROR]] (opcode 6A) | ||
In this admode, the [[accumulator]] is the operand.<sup>[3]</sup> | They all are one byte long. None of them write to or read from external memory. They are all read-modify-write instructions. | ||
In this admode, the [[accumulator]] is the operand.<sup>[3]</sup> In [[native mode]] when the [[m flag]] is clear, the accumulator is 16 bits wide. Otherwise it is 8 bit (when m is set or in [[emulation mode]]). | |||
==== Syntax ==== | ==== Syntax ==== | ||
<pre> | <pre> | ||
ROR | ROR | ||
RORA | |||
ROR A | |||
</pre> | </pre> | ||
Interestingly, [[XBA]] is not considered to use accumulator addressing, perhaps because when the high B byte is hidden it is not a proper accumulator and other instructions do not operate on it. Less surprisingly, neither are the transfer instructions which include the accumulator as an operand. But [[XCN]] on the [[SPC700]] is considered to use accumulator addressing; it does not operate on any other data. | |||
=== See Also === | === See Also === | ||
* [[Implied Addressing]] | * [[Implied Addressing]] | ||
* [[Immediate Addressing]] | * [[Immediate Addressing]] | ||
=== | === References === | ||
# [[Eyes & Lichty]], | # [[Eyes & Lichty]], [https://archive.org/details/0893037893ProgrammingThe65816/page/387 page 387] | ||
# | # [https://archive.org/details/0893037893ProgrammingThe65816/page/126 page 126], lbid | ||
# section 3.5.8 of 65c816 datasheet, https://westerndesigncenter.com/wdc/documentation/w65c816s.pdf | # section 3.5.8 of 65c816 datasheet, https://westerndesigncenter.com/wdc/documentation/w65c816s.pdf | ||
# Clark, Bruce. http://www.6502.org/tutorials/65c816opcodes.html#5.6 | |||
[[Category:ASM]] | [[Category:ASM]] | ||
[[Category:Addressing Modes]] | [[Category:Addressing Modes]] | ||
[[Category:Simple Admodes]] | |||
[[Category:Inherited from 6502]] | [[Category:Inherited from 6502]] | ||
Latest revision as of 15:07, 11 August 2024
There are six instructions that support Accumulator Addressing on the 65c816:
They all are one byte long. None of them write to or read from external memory. They are all read-modify-write instructions.
In this admode, the accumulator is the operand.[3] In native mode when the m flag is clear, the accumulator is 16 bits wide. Otherwise it is 8 bit (when m is set or in emulation mode).
Syntax
ROR RORA ROR A
Interestingly, XBA is not considered to use accumulator addressing, perhaps because when the high B byte is hidden it is not a proper accumulator and other instructions do not operate on it. Less surprisingly, neither are the transfer instructions which include the accumulator as an operand. But XCN on the SPC700 is considered to use accumulator addressing; it does not operate on any other data.
See Also
References
- Eyes & Lichty, page 387
- page 126, lbid
- section 3.5.8 of 65c816 datasheet, https://westerndesigncenter.com/wdc/documentation/w65c816s.pdf
- Clark, Bruce. http://www.6502.org/tutorials/65c816opcodes.html#5.6