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VRAM Data Bus: Difference between revisions
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The ''' | The '''VRAM Data Bus''' is the data bus that connects [[S-PPU1]] and [[S-PPU2]] to the [[VRAM]] chips. It consists of two 8-bit data buses: VDA and VDB. | ||
* VDA0-VDA7 connects to the VRAM chip which has VAA going to it | |||
* VDB0-VDB7 connects to the other VRAM chip, which has VDB going to it. | |||
It is drawn in blue in the colorized [[jwdonal schematic]]. | |||
=== See Also === | |||
* [[VRAM Bus Control]] | |||
=== External Links === | |||
# Figure 2-22-1 on [https://archive.org/details/SNESDevManual/book1/page/n98 page 2-22-2 of Book I] | |||
[[Category:SNES Hardware]] | [[Category:SNES Hardware]] | ||
[[Category:Traces]] | [[Category:Traces]] | ||
[[Category:Buses]] | [[Category:Buses]] | ||
Latest revision as of 18:39, 29 December 2023
The VRAM Data Bus is the data bus that connects S-PPU1 and S-PPU2 to the VRAM chips. It consists of two 8-bit data buses: VDA and VDB.
- VDA0-VDA7 connects to the VRAM chip which has VAA going to it
- VDB0-VDB7 connects to the other VRAM chip, which has VDB going to it.
It is drawn in blue in the colorized jwdonal schematic.
See Also
External Links
- Figure 2-22-1 on page 2-22-2 of Book I