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TAX: Difference between revisions
From SnesLab
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{| class="wikitable" style="float:right;clear:right;width:40%" | |||
{| class="wikitable" style="float:right;clear:right;width: | |||
!colspan="8"|Basic Info | !colspan="8"|Basic Info | ||
|+ | |+ | ||
| Line 9: | Line 7: | ||
|'''Speed''' | |'''Speed''' | ||
|+ | |+ | ||
| | |[[Implied]] (type 1) | ||
|AA | |AA | ||
|1 byte | |1 byte | ||
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{| class="wikitable" style="float:right;clear:right;width:30%" | {| class="wikitable" style="float:right;clear:right;width:30%" | ||
!colspan="8"|Flags | !colspan="8"|Flags Affected | ||
|+ | |||
|[[Negative Flag|N]] | |||
|[[Overflow Flag|V]] | |||
|[[M Flag|M]] | |||
|[[X Flag|X]] | |||
|[[Decimal Flag|D]] | |||
|[[I Flag|I]] | |||
|[[Zero Flag|Z]] | |||
|[[Carry Flag|C]] | |||
|+ | |+ | ||
|N | |N | ||
|. | |. | ||
|. | |. | ||
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|. | |. | ||
|. | |. | ||
|Z | |||
|. | |||
|} | |||
'''TAX''' is a 65x instruction that transfers the value of the [[accumulator]] to the [[X index register]]. | |||
{| class="wikitable" style="float:right;clear:right;width:40%" | |||
!colspan="3"|Instruction Behavior | |||
|+ | |||
| | | | ||
| | |'''8-bit accumulator (m=1)''' | ||
|'''16-bit accumulator (m=0)''' | |||
|+ | |||
|'''8-bit index registers (x=1)''' | |||
|8 bits are transferred | |||
|8 bits are transferred (low byte of accumulator) | |||
|+ | |||
|'''16-bit index registers (x=0)''' | |||
|16 bits are transferred | |||
|16 bits are transferred | |||
|} | |} | ||
==== Syntax ==== | |||
<pre> | |||
TAX | |||
</pre> | |||
=== See Also === | === See Also === | ||
* [[TAY]] | * [[TAY]] | ||
* [[TXA]] | |||
* [[TAD]] | |||
* [[TCS]] | |||
=== External Links === | === External Links === | ||
* [[Eyes & Lichty]] page on TAX: https://archive.org/details/ | * [[Eyes & Lichty]], [https://archive.org/details/0893037893ProgrammingThe65816/page/508 page 508] on TAX | ||
* [[ | * [[Labiak]], [https://archive.org/details/Programming_the_65816/page/n199 page 189] on TAX | ||
* 7.11 on [[MCS6500 Manual]], [https://archive.org/details/mos_microcomputers_programming_manual/page/n118 page 100] on TAX | |||
* [[Carr]], [https://archive.org/details/6502UsersManual/page/n288 page 275] on TAX | |||
* [[Leventhal]], [https://archive.org/details/6502-assembly-language-programming/page/n148 page 3-99] on TAX | |||
* snes9x implementation of TAX: https://github.com/snes9xgit/snes9x/blob/master/cpuops.cpp#L2258 | |||
[[Category:ASM]] | [[Category:ASM]] | ||
[[Category:Inherited from 6502]] | [[Category:Inherited from 6502]] | ||
[[Category:Transfer Instructions]] | |||
[[Category:Implied Instructions]] | |||
[[Category:Two-cycle Instructions]] | |||
Latest revision as of 22:48, 7 August 2024
| Basic Info | |||||||
|---|---|---|---|---|---|---|---|
| Addressing Mode | Opcode | Length | Speed | ||||
| Implied (type 1) | AA | 1 byte | 2 cycles | ||||
| Flags Affected | |||||||
|---|---|---|---|---|---|---|---|
| N | V | M | X | D | I | Z | C |
| N | . | . | . | . | . | Z | . |
TAX is a 65x instruction that transfers the value of the accumulator to the X index register.
| Instruction Behavior | ||
|---|---|---|
| 8-bit accumulator (m=1) | 16-bit accumulator (m=0) | |
| 8-bit index registers (x=1) | 8 bits are transferred | 8 bits are transferred (low byte of accumulator) |
| 16-bit index registers (x=0) | 16 bits are transferred | 16 bits are transferred |
Syntax
TAX
See Also
External Links
- Eyes & Lichty, page 508 on TAX
- Labiak, page 189 on TAX
- 7.11 on MCS6500 Manual, page 100 on TAX
- Carr, page 275 on TAX
- Leventhal, page 3-99 on TAX
- snes9x implementation of TAX: https://github.com/snes9xgit/snes9x/blob/master/cpuops.cpp#L2258