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DEC: Difference between revisions
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{| class="wikitable" style="float:right;clear:right;width:40%" | |||
{| class="wikitable" style="float:right;clear:right;width: | |||
!colspan="8"|Basic Info | !colspan="8"|Basic Info | ||
|+ | |+ | ||
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|'''Speed''' | |'''Speed''' | ||
|+ | |+ | ||
| | |[[Accumulator Addressing|Accumulator]] | ||
|3A | |3A | ||
|1 byte | |1 byte | ||
|2 cycles | |2 cycles | ||
|+ | |+ | ||
| | |[[Absolute]] | ||
|CE | |CE | ||
|3 bytes | |3 bytes | ||
|6 cycles | |6 cycles* | ||
|+ | |+ | ||
| | |[[Direct Page Addressing | Direct Page]] | ||
|C6 | |C6 | ||
|2 bytes | |2 bytes | ||
|5 cycles | |5 cycles* | ||
|+ | |+ | ||
| | |[[Absolute Indexed by X]] | ||
|DE | |DE | ||
|3 bytes | |3 bytes | ||
|7 cycles | |7 cycles* | ||
|+ | |+ | ||
| | |[[Direct Page Indexed by X]] | ||
|D6 | |D6 | ||
|2 bytes | |2 bytes | ||
|6 cycles | |6 cycles* | ||
|} | |} | ||
{| class="wikitable" style="float:right;clear:right;width:30%" | {| class="wikitable" style="float:right;clear:right;width:30%" | ||
!colspan="9"|Flags | !colspan="9"|Flags Affected | ||
|+ | |||
|[[Negative Flag|N]] | |||
|[[Overflow Flag|V]] | |||
|[[M Flag|M]] | |||
|[[X Flag|X]] | |||
|[[Decimal Flag|D]] | |||
|[[I Flag|I]] | |||
|[[Zero Flag|Z]] | |||
|[[Carry Flag|C]] | |||
|+ | |+ | ||
|N | |N | ||
|. | |. | ||
|. | |. | ||
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|. | |. | ||
|. | |. | ||
| | |Z | ||
|. | |. | ||
|} | |} | ||
'''DEC''' (Decrement) is a 65x instruction that decrements the value in the location specified by the operand by one. The size of the [[accumulator]] determines whether this is an 8 or 16 bit operation. An alternate mnemonic when the operand is the accumulator is "DEA." | |||
DEC ignores the [[decimal mode flag]] and the [[carry flag]]. | |||
==== Syntax ==== | |||
<pre> | |||
DEC | |||
DEC A | |||
DEA | |||
DEC addr | |||
DEC dp | |||
DEC addr, X | |||
DEC dp, X | |||
</pre> | |||
If you need to subtract two or more from the [[accumulator]], consider [[SBC]] instead. | |||
==== Cycle Penalties ==== | |||
* Except in [[accumulator addressing]], DEC takes two extra cycles when the accumulator is 16 bits wide. | |||
* In [[direct page addressing]] modes, DEC takes an extra cycle when the low byte of the [[direct page register]] is nonzero | |||
Although the NMOS 6502 does have DEC, it does not work on the accumulator. When porting code to the 65c816, utilizing DEC more often instead of SBC can make code smaller and faster. | |||
=== See Also === | === See Also === | ||
* [[INC]] | * [[INC]] | ||
* [[DEX]] | |||
* [[DEY]] | |||
* [[DEC (SPC700)]] | |||
* [[DEC (Super FX)]] | |||
=== External Links === | === External Links === | ||
* [[Eyes & Lichty]] | * [[Eyes & Lichty]], [https://archive.org/details/0893037893ProgrammingThe65816/page/451 page 451] on DEC | ||
* [[Labiak]] | * [[Labiak]], [https://archive.org/details/Programming_the_65816/page/n148 page 138] on DEC | ||
* [[MCS6500 Manual]] | * 10.8 on [[MCS6500 Manual]], [https://archive.org/details/mos_microcomputers_programming_manual/page/n176 page 155] on DEC | ||
* [[Carr]] | * [[Carr]], [https://archive.org/details/6502UsersManual/page/n270 page 257] on DEC | ||
* [[Leventhal]] | * [[Leventhal]], [https://archive.org/details/6502-assembly-language-programming/page/n109 page 3-60] on DEC | ||
* snes9x implementation of DEC: https://github.com/snes9xgit/snes9x/blob/master/cpuops.cpp#L482 | |||
* undisbeliever on DEC: https://undisbeliever.net/snesdev/65816-opcodes.html#dec-decrement | |||
* Pickens, John. http://www.6502.org/tutorials/6502opcodes.html#DEC | |||
* Clark, Bruce. http://www.6502.org/tutorials/65c816opcodes.html#6.1.1.3 | |||
[[Category:ASM]] | [[Category:ASM]] |
Latest revision as of 23:24, 27 September 2024
Basic Info | |||||||
---|---|---|---|---|---|---|---|
Addressing Mode | Opcode | Length | Speed | ||||
Accumulator | 3A | 1 byte | 2 cycles | ||||
Absolute | CE | 3 bytes | 6 cycles* | ||||
Direct Page | C6 | 2 bytes | 5 cycles* | ||||
Absolute Indexed by X | DE | 3 bytes | 7 cycles* | ||||
Direct Page Indexed by X | D6 | 2 bytes | 6 cycles* |
Flags Affected | ||||||||
---|---|---|---|---|---|---|---|---|
N | V | M | X | D | I | Z | C | |
N | . | . | . | . | . | Z | . |
DEC (Decrement) is a 65x instruction that decrements the value in the location specified by the operand by one. The size of the accumulator determines whether this is an 8 or 16 bit operation. An alternate mnemonic when the operand is the accumulator is "DEA."
DEC ignores the decimal mode flag and the carry flag.
Syntax
DEC DEC A DEA DEC addr DEC dp DEC addr, X DEC dp, X
If you need to subtract two or more from the accumulator, consider SBC instead.
Cycle Penalties
- Except in accumulator addressing, DEC takes two extra cycles when the accumulator is 16 bits wide.
- In direct page addressing modes, DEC takes an extra cycle when the low byte of the direct page register is nonzero
Although the NMOS 6502 does have DEC, it does not work on the accumulator. When porting code to the 65c816, utilizing DEC more often instead of SBC can make code smaller and faster.
See Also
External Links
- Eyes & Lichty, page 451 on DEC
- Labiak, page 138 on DEC
- 10.8 on MCS6500 Manual, page 155 on DEC
- Carr, page 257 on DEC
- Leventhal, page 3-60 on DEC
- snes9x implementation of DEC: https://github.com/snes9xgit/snes9x/blob/master/cpuops.cpp#L482
- undisbeliever on DEC: https://undisbeliever.net/snesdev/65816-opcodes.html#dec-decrement
- Pickens, John. http://www.6502.org/tutorials/6502opcodes.html#DEC
- Clark, Bruce. http://www.6502.org/tutorials/65c816opcodes.html#6.1.1.3