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'''STP''' (SToP-the-clock)[1] is an instruction that halts the CPU, putting it into a low power state until it is reset.  The [[PHI2]] clock is held high.
{| class="wikitable" style="float:right;clear:right;width:40%"
 
{| class="wikitable" style="float:right;clear:right;width:30%"
!colspan="8"|Basic Info
!colspan="8"|Basic Info
|+
|+
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|'''Speed'''
|'''Speed'''
|+
|+
|implied
|[[Implied]] (type 3)
|DB
|DB
|1 byte
|1 byte
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{| class="wikitable" style="float:right;clear:right;width:30%"
!colspan="8"|Flags Clobbered
!colspan="8"|Flags Affected
|+
|+
|N
|[[Negative Flag|N]]
|V
|[[Overflow Flag|V]]
|M
|[[M Flag|M]]
|X
|[[X Flag|X]]
|D
|[[Decimal Flag|D]]
|I
|[[I Flag|I]]
|Z
|[[Zero Flag|Z]]
|C
|[[Carry Flag|C]]
|+
|+
|.
|.
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[[Category: ASM]]
'''STP''' (SToP-the-clock)<sup>[1]</sup> is an instruction that halts the [[65c816]], putting it into a low power state until it is reset.  The [[PHI2]] clock is held high.
 
No flags are affected.
 
Recall that the [[cartridge slot]] and [[expansion port]] can both reset the [[control deck]].
 
==== Syntax ====
<pre>
STP
</pre>
 
Eyes & Lichty (at the bottom of page 504) claims that STP was first introduced on the 65802/816, but it is on the 65c02 datasheet.
 
[[Category:ASM]]
[[Category:65c02 additions]]
[[Category:65c02 additions]]
[[Category:One-byte Instructions]]
[[Category:Control Instructions]]
[[Category:Implied Instructions]]
[[Category:Three-cycle Instructions]]
[[Category:Single Admode Mnemonics]]
=== See Also ===
* [[WAI]]
* [[NOP]]
* [[WDM]]
* [[STOP (SPC700)]]
* [[STOP (Super FX)]]
* [[Reset Traces]]


=== External Links ===
=== External Links ===
* [[Eyes & Lichty]] page on STP: https://archive.org/details/0893037893ProgrammingThe65816/page/n530
* [[Eyes & Lichty]], [https://archive.org/details/0893037893ProgrammingThe65816/page/504 page 504] on STP
* [[Labiak]] page on STP: https://archive.org/details/Programming_the_65816/page/n195
* [[Labiak]], [https://archive.org/details/Programming_the_65816/page/n195 page 185] on STP
* snes9x implementation of STP: https://github.com/snes9xgit/snes9x/blob/master/cpuops.cpp#L3328
* snes9x implementation of STP: https://github.com/snes9xgit/snes9x/blob/master/cpuops.cpp#L3328
* undisbeliever on STP: https://undisbeliever.net/snesdev/65816-opcodes.html#stp-stop-the-processor
* Clark, Bruce. http://www.6502.org/tutorials/65c816opcodes.html#6.9


=== References ===
=== References ===
* [1] Although "Stop The Processor" fits, all the letters in this mnemonic are from the word "stop."  See row 58 of Table 5-1, "Instruction Set Table" on Page 21 of the official 65c02 datasheet: https://www.westerndesigncenter.com/wdc/documentation/w65c02s.pdf
# Although "Stop The Processor" fits, all the letters in this mnemonic are from the word "stop."  See row 58 of Table 5-1, "Instruction Set Table" on Page 21 of the official 65c02 datasheet: https://www.westerndesigncenter.com/wdc/documentation/w65c02s.pdf

Latest revision as of 15:34, 20 August 2024

Basic Info
Addressing Mode Opcode Length Speed
Implied (type 3) DB 1 byte 3 cycles
Flags Affected
N V M X D I Z C
. . . . . . . .

STP (SToP-the-clock)[1] is an instruction that halts the 65c816, putting it into a low power state until it is reset. The PHI2 clock is held high.

No flags are affected.

Recall that the cartridge slot and expansion port can both reset the control deck.

Syntax

STP

Eyes & Lichty (at the bottom of page 504) claims that STP was first introduced on the 65802/816, but it is on the 65c02 datasheet.

See Also

External Links

References

  1. Although "Stop The Processor" fits, all the letters in this mnemonic are from the word "stop." See row 58 of Table 5-1, "Instruction Set Table" on Page 21 of the official 65c02 datasheet: https://www.westerndesigncenter.com/wdc/documentation/w65c02s.pdf