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TCLR1 (SPC700): Difference between revisions
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'''TCLR1''' is an [[SPC700]] instruction that tests and clears memory bits using the [[accumulator]]. For every set bit in the accumulator, the corresponding memory bit is cleared. | '''TCLR1''' is an [[SPC700]] instruction that tests and clears memory bits using the [[accumulator]]. For every set bit in the accumulator, the corresponding memory bit is cleared. | ||
==== Syntax ==== | |||
<pre> | |||
TCLR1 !abs | |||
</pre> | |||
=== See Also === | === See Also === | ||
Revision as of 19:23, 6 July 2024
| Basic Info | |||||||
|---|---|---|---|---|---|---|---|
| Addressing Mode | Opcode | Length | Speed | ||||
| Absolute | 4E | 3 byte | 6 cycles | ||||
| Flags Affected | |||||||
|---|---|---|---|---|---|---|---|
| N | V | P | B | H | I | Z | C |
| . | . | . | . | . | . | ||
TCLR1 is an SPC700 instruction that tests and clears memory bits using the accumulator. For every set bit in the accumulator, the corresponding memory bit is cleared.
Syntax
TCLR1 !abs
See Also
External Links
- Official Nintendo documentation on TCLR1: Table C-18 in Appendix C-9 of Book I
- subparagraph 8.2.3.2 of page 3-8-8, lbid.