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TAX: Difference between revisions

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* [[TXA]]
* [[TXA]]
* [[TAD]]
* [[TAD]]
* [[TCS]]


=== External Links ===
=== External Links ===

Revision as of 04:00, 16 July 2024

Basic Info
Addressing Mode Opcode Length Speed
Implied (type 1) AA 1 byte 2 cycles
Flags Affected
N V M X D I Z C
. . . . . .

TAX is a 65x instruction that transfers the value of the accumulator to the X index register.

Instruction Behavior
8-bit accumulator (m=1) 16-bit accumulator (m=0)
8-bit index registers (x=1) 8 bits are transferred 8 bits are transferred (low byte of accumulator)
16-bit index registers (x=0) 16 bits are transferred 16 bits are transferred

Syntax

TAX

See Also

External Links