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Overflow Flag: Difference between revisions
From SnesLab
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* [[ADC]] | * [[ADC]] | ||
* [[SBC]] | * [[SBC]] | ||
* [[CLV]] | * [[CLV]] (always clears it) | ||
* [[BIT]] | * [[BIT]] | ||
* [[PLP]] | * [[PLP]] | ||
* [[RTI]] | * [[RTI]] | ||
* [[SEP]] | * [[SEP]] (might set it) | ||
* [[REP]] | * [[REP]] (might clear it) | ||
It may be the most misunderstood flag of the [[65c816]].<sup>[2]</sup> It is bit 6 of the [[status register]]. | It may be the most misunderstood flag of the [[65c816]].<sup>[2]</sup> It is bit 6 of the [[status register]]. | ||
Revision as of 09:34, 21 July 2024
The Overflow Flag (V) is affected only by the following eight instructions:
It may be the most misunderstood flag of the 65c816.[2] It is bit 6 of the status register.
There is no SEV instruction to directly set the overflow flag, but the 6502 and 65c02 do have a hardware signal to set it.
On the SPC700 it can be cleared with CLRV and is set whenever the half-carry flag is set.
See Also
References
- Eyes & Lichty, page 439: https://archive.org/details/0893037893ProgrammingThe65816/page/439
- Clark, Bruce. http://www.6502.org/tutorials/vflag.html
- Shirriff, Ken. https://www.righto.com/2012/12/the-6502-overflow-flag-explained.html?m=1
- lbid. https://www.righto.com/2013/01/a-small-part-of-6502-chip-explained.html?m=1
- Labiak. https://archive.org/details/Programming_the_65816/page/n118
- Pickens, John. NMOS 6502 Opcodes. http://www.6502.org/tutorials/6502opcodes.html#VFLAG