REP: Difference between revisions

Latest revision as of 20:35, 17 August 2024


Basic Info
Addressing Mode	Opcode	Length	Speed
Immediate	C2	2 bytes	3 cycles


Flags Affected
	N	V	M	X	D	I	Z	C
emulation mode	N	V	.	.	D	I	Z	C
native mode	N	V	M	X	D	I	Z	C

REP (Reset Status Bits) is a 65c816 instruction that clears bits in the status register that correspond to set bits in the operand.

REP is the only way to clear the m and x flags directly without disturbing the stack (but PLP and RTI may clear them too.)^[1] But, REP can't clear those two flags in emulation mode because they are being forced to be set.

Syntax

REP #%nvmxdizc

If you only want to clear one flag, CLC, CLV, CLD, and CLI are smaller/faster than REP. Early 65c816 chips had a timing problem with REP and SEP which required a NOP to be inserted after them, or to stretch the clock.^[5]

References

Eyes & Lichty, page 489 on REP
Labiak, page 173 on REP
snes9x implementation of REP: https://github.com/snes9xgit/snes9x/blob/master/cpuops.cpp#L3145
undisbeliever on REP: https://undisbeliever.net/snesdev/65816-opcodes.html#rep-reset-status-bits
http://forum.6502.org/viewtopic.php?f=4&t=5196

@@ Line 56: / Line 56: @@
 </pre>
-If you only want to clear one flag, [[CLC]], [[CLV]], [[CLD]], and [[CLI]] are smaller/faster than REP.  Early 65c816 chips had a timing problem with REP and [[SEP]] which required a [[NOP]] to be inserted after them, or to stretch the clock.<sup>[4]</sup>
+If you only want to clear one flag, [[CLC]], [[CLV]], [[CLD]], and [[CLI]] are smaller/faster than REP.  Early 65c816 chips had a timing problem with REP and [[SEP]] which required a [[NOP]] to be inserted after them, or to stretch the clock.<sup>[5]</sup>
 === See Also ===