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DEC: Difference between revisions

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(→‎Cycle Penalties: deindented)
(NMOS 6502 DEC does not work on accumulator)
 
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* Except in [[accumulator addressing]], DEC takes two extra cycles when the accumulator is 16 bits wide.
* Except in [[accumulator addressing]], DEC takes two extra cycles when the accumulator is 16 bits wide.
* In [[direct page addressing]] modes, DEC takes an extra cycle when the low byte of the [[direct page register]] is nonzero
* In [[direct page addressing]] modes, DEC takes an extra cycle when the low byte of the [[direct page register]] is nonzero
Although the NMOS 6502 does have DEC, it does not work on the accumulator.  When porting code to the 65c816, utilizing DEC more often instead of SBC can make code smaller and faster.


=== See Also ===
=== See Also ===

Latest revision as of 23:24, 27 September 2024

Basic Info
Addressing Mode Opcode Length Speed
Accumulator 3A 1 byte 2 cycles
Absolute CE 3 bytes 6 cycles*
Direct Page C6 2 bytes 5 cycles*
Absolute Indexed by X DE 3 bytes 7 cycles*
Direct Page Indexed by X D6 2 bytes 6 cycles*
Flags Affected
N V M X D I Z C
N . . . . . Z .

DEC (Decrement) is a 65x instruction that decrements the value in the location specified by the operand by one. The size of the accumulator determines whether this is an 8 or 16 bit operation. An alternate mnemonic when the operand is the accumulator is "DEA."

DEC ignores the decimal mode flag and the carry flag.

Syntax

DEC
DEC A
DEA
DEC addr
DEC dp
DEC addr, X
DEC dp, X

If you need to subtract two or more from the accumulator, consider SBC instead.

Cycle Penalties

Although the NMOS 6502 does have DEC, it does not work on the accumulator. When porting code to the 65c816, utilizing DEC more often instead of SBC can make code smaller and faster.

See Also

External Links