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TCLR1 (SPC700): Difference between revisions
From SnesLab
(→See Also: CLR1) |
(→See Also: TRB) |
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* [[TSET1]] | * [[TSET1]] | ||
* [[CLR1]] | * [[CLR1]] | ||
* [[TRB]] | |||
=== External Links === | === External Links === | ||
Revision as of 17:31, 23 July 2023
| Basic Info | |||||||
|---|---|---|---|---|---|---|---|
| Addressing Mode | Opcode | Length | Speed | ||||
| absolute | 4E | 3 byte | 6 cycles | ||||
| Flags Clobbered | |||||||
|---|---|---|---|---|---|---|---|
| N | V | P | B | H | I | Z | C |
| . | . | . | . | . | . | ||
TCLR1 is an SPC700 instruction that tests and clears bits with the accumulator.
See Also
External Links
- Official Nintendo documentation on TCLR1: Appendix C-9 of Book I