TCLR1 (SPC700): Difference between revisions

Revision as of 00:14, 24 July 2023


Basic Info
Addressing Mode	Opcode	Length	Speed
absolute	4E	3 byte	6 cycles


Flags Affected
N	V	P	B	H	I	Z	C
	.	.	.	.	.		.

TCLR1 is an SPC700 instruction that tests and clears memory bits using the accumulator. For every set bit in the accumulator, the corresponding memory bit is cleared.

External Links

Official Nintendo documentation on TCLR1: Appendix C-9 of Book I

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-'''TCLR1''' is an [[SPC700]] instruction that tests and clears bits with the [[accumulator]].
+'''TCLR1''' is an [[SPC700]] instruction that tests and clears memory bits using the [[accumulator]].  For every set bit in the accumulator, the corresponding memory bit is cleared.
 === See Also ===