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TAX: Difference between revisions
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=== External Links === | === External Links === | ||
* [[Eyes & Lichty]] page on TAX: https://archive.org/details/0893037893ProgrammingThe65816/page/n534 | * [[Eyes & Lichty]] page 508, on TAX: https://archive.org/details/0893037893ProgrammingThe65816/page/n534 | ||
* [[Labiak]] page on TAX: https://archive.org/details/Programming_the_65816/page/n199 | * [[Labiak]] page on TAX: https://archive.org/details/Programming_the_65816/page/n199 | ||
* [[MCS6500 Manual]] page on TAX: https://archive.org/details/mos_microcomputers_programming_manual/page/n118 | * [[MCS6500 Manual]] page on TAX: https://archive.org/details/mos_microcomputers_programming_manual/page/n118 | ||
Revision as of 04:25, 21 November 2023
| Basic Info | |||||||
|---|---|---|---|---|---|---|---|
| Addressing Mode | Opcode | Length | Speed | ||||
| Implied (type 1) | AA | 1 byte | 2 cycles | ||||
| Flags Affected | |||||||
|---|---|---|---|---|---|---|---|
| N | V | M | X | D | I | Z | C |
| . | . | . | . | . | . | ||
TAX is a 65x instruction that transfers the value of the accumulator to the X index register.
| Instruction Behavior | ||
|---|---|---|
| 8-bit accumulator (m=1) | 16-bit accumulator (m=0) | |
| 8-bit index registers (x=1) | 8 bits are transferred | 8 bits are transferred (low byte of accumulator) |
| 16-bit index registers (x=0) | 16 bits are transferred | 16 bits are transferred |
See Also
External Links
- Eyes & Lichty page 508, on TAX: https://archive.org/details/0893037893ProgrammingThe65816/page/n534
- Labiak page on TAX: https://archive.org/details/Programming_the_65816/page/n199
- MCS6500 Manual page on TAX: https://archive.org/details/mos_microcomputers_programming_manual/page/n118
- Carr page on TAX: https://archive.org/details/6502UsersManual/page/n288
- Leventhal page on TAX: https://archive.org/details/6502-assembly-language-programming/page/n148
- snes9x implementation of TAX: https://github.com/snes9xgit/snes9x/blob/master/cpuops.cpp#L2258