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TRB: Difference between revisions
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Revision as of 23:22, 23 July 2024
| Basic Info | |||||||
|---|---|---|---|---|---|---|---|
| Addressing Mode | Opcode | Length | Speed | ||||
| Absolute | 1C | 3 bytes | 6 cycles* | ||||
| Direct Page | 14 | 2 bytes | 5 cycles* | ||||
| Flags Affected | |||||||
|---|---|---|---|---|---|---|---|
| N | V | M | X | D | I | Z | C |
| . | . | . | . | . | . | . | |
TRB (Test and Reset Bits) is a 65c816 instruction that tests and resets bits using the accumulator. For each set bit in the accumulator, the corresponding memory bit is cleared.
TRB performs a logical AND (conjunction) and the zero flag is set or cleared to reflect whether the conjunction is zero.
Syntax
TRB addr TRB dp
Cycle Penalties
- In both addressing modes, TRB takes two extra cycles if the accumulator is 16 bits wide.
- In direct page addressing, TRB takes another extra cycle if the low byte of the direct page register is nonzero.
See Also
External Links
- Eyes & Lichty page 513, on TRB: https://archive.org/details/0893037893ProgrammingThe65816/page/513
- Labiak page 194 on TRB: https://archive.org/details/Programming_the_65816/page/n204
- snes9x implementation of TRB: https://github.com/snes9xgit/snes9x/blob/master/cpuops.cpp#L1338
- undisbeliever on TRB: https://undisbeliever.net/snesdev/65816-opcodes.html#trb-test-and-reset-memory-bits-against-accumulator]