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Accumulator Addressing: Difference between revisions
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# page 126, lbid: https://archive.org/details/0893037893ProgrammingThe65816/page/126 | # page 126, lbid: https://archive.org/details/0893037893ProgrammingThe65816/page/126 | ||
# section 3.5.8 of 65c816 datasheet, https://westerndesigncenter.com/wdc/documentation/w65c816s.pdf | # section 3.5.8 of 65c816 datasheet, https://westerndesigncenter.com/wdc/documentation/w65c816s.pdf | ||
# Clark, Bruce. http://www.6502.org/tutorials/65c816opcodes.html#5.6 | |||
[[Category:ASM]] | [[Category:ASM]] | ||
Revision as of 08:07, 24 July 2024
There are six instructions that support Accumulator Addressing on the 65c816. They are:
They all are one byte long.
In this admode, the accumulator is the operand.[3] In native mode when the m flag is clear, the accumulator is 16 bits wide. Otherwise it is 8 bit (when m is set or in emulation mode).
Syntax
ROR RORA ROR A
Interestingly, XBA is not considered to use accumulator addressing. But XCN on the SPC700 is.
See Also
References
- Eyes & Lichty, page 387: https://archive.org/details/0893037893ProgrammingThe65816/page/387
- page 126, lbid: https://archive.org/details/0893037893ProgrammingThe65816/page/126
- section 3.5.8 of 65c816 datasheet, https://westerndesigncenter.com/wdc/documentation/w65c816s.pdf
- Clark, Bruce. http://www.6502.org/tutorials/65c816opcodes.html#5.6