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TAX: Difference between revisions
From SnesLab
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* [[MCS6500 Manual]] page 100 on TAX: https://archive.org/details/mos_microcomputers_programming_manual/page/n118 | * [[MCS6500 Manual]] page 100 on TAX: https://archive.org/details/mos_microcomputers_programming_manual/page/n118 | ||
* [[Carr]], [https://archive.org/details/6502UsersManual/page/n288 page 275] on TAX | * [[Carr]], [https://archive.org/details/6502UsersManual/page/n288 page 275] on TAX | ||
* [[Leventhal]] | * [[Leventhal]], [https://archive.org/details/6502-assembly-language-programming/page/n148 page 3-99] on TAX | ||
* snes9x implementation of TAX: https://github.com/snes9xgit/snes9x/blob/master/cpuops.cpp#L2258 | * snes9x implementation of TAX: https://github.com/snes9xgit/snes9x/blob/master/cpuops.cpp#L2258 | ||
Revision as of 22:47, 7 August 2024
| Basic Info | |||||||
|---|---|---|---|---|---|---|---|
| Addressing Mode | Opcode | Length | Speed | ||||
| Implied (type 1) | AA | 1 byte | 2 cycles | ||||
| Flags Affected | |||||||
|---|---|---|---|---|---|---|---|
| N | V | M | X | D | I | Z | C |
| N | . | . | . | . | . | Z | . |
TAX is a 65x instruction that transfers the value of the accumulator to the X index register.
| Instruction Behavior | ||
|---|---|---|
| 8-bit accumulator (m=1) | 16-bit accumulator (m=0) | |
| 8-bit index registers (x=1) | 8 bits are transferred | 8 bits are transferred (low byte of accumulator) |
| 16-bit index registers (x=0) | 16 bits are transferred | 16 bits are transferred |
Syntax
TAX
See Also
External Links
- Eyes & Lichty, page 508 on TAX
- Labiak, page 189 on TAX
- MCS6500 Manual page 100 on TAX: https://archive.org/details/mos_microcomputers_programming_manual/page/n118
- Carr, page 275 on TAX
- Leventhal, page 3-99 on TAX
- snes9x implementation of TAX: https://github.com/snes9xgit/snes9x/blob/master/cpuops.cpp#L2258