We've just updated MediaWiki and its underlying software. If anything doesn't look or work quite right, please mention it to us. --RanAS

TAX: Difference between revisions

From SnesLab
Jump to: navigation, search
(→‎External Links: hid archive URL for Leventhal)
(→‎External Links: hid archive URL for MCS)
 
Line 67: Line 67:
* [[Eyes & Lichty]], [https://archive.org/details/0893037893ProgrammingThe65816/page/508 page 508] on TAX
* [[Eyes & Lichty]], [https://archive.org/details/0893037893ProgrammingThe65816/page/508 page 508] on TAX
* [[Labiak]], [https://archive.org/details/Programming_the_65816/page/n199 page 189] on TAX
* [[Labiak]], [https://archive.org/details/Programming_the_65816/page/n199 page 189] on TAX
* [[MCS6500 Manual]] page 100 on TAX: https://archive.org/details/mos_microcomputers_programming_manual/page/n118
* 7.11 on [[MCS6500 Manual]], [https://archive.org/details/mos_microcomputers_programming_manual/page/n118 page 100] on TAX
* [[Carr]], [https://archive.org/details/6502UsersManual/page/n288 page 275] on TAX
* [[Carr]], [https://archive.org/details/6502UsersManual/page/n288 page 275] on TAX
* [[Leventhal]], [https://archive.org/details/6502-assembly-language-programming/page/n148 page 3-99] on TAX
* [[Leventhal]], [https://archive.org/details/6502-assembly-language-programming/page/n148 page 3-99] on TAX

Latest revision as of 22:48, 7 August 2024

Basic Info
Addressing Mode Opcode Length Speed
Implied (type 1) AA 1 byte 2 cycles
Flags Affected
N V M X D I Z C
N . . . . . Z .

TAX is a 65x instruction that transfers the value of the accumulator to the X index register.

Instruction Behavior
8-bit accumulator (m=1) 16-bit accumulator (m=0)
8-bit index registers (x=1) 8 bits are transferred 8 bits are transferred (low byte of accumulator)
16-bit index registers (x=0) 16 bits are transferred 16 bits are transferred

Syntax

TAX

See Also

External Links