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TCLR1 (SPC700)

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Revision as of 05:13, 18 December 2023 by Xetheria (talk | contribs) (applicable memory location)
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Basic Info
Addressing Mode Opcode Length Speed
Absolute 4E 3 byte 6 cycles
Flags Affected
N V P B H I Z C
. . . . . .

TCLR1 is an SPC700 instruction that tests and clears memory bits using the accumulator. For every set bit in the accumulator, the corresponding memory bit is cleared.

See Also

External Links

  1. Official Nintendo documentation on TCLR1: Table C-18 in Appendix C-9 of Book I
  2. https://archive.org/details/SNESDevManual/book1/page/n186